| Submission Open for Jan-Dec-2024 |
| Last Date of Submission : |
| 20th, April-2024 |
| Acceptance Notification : |
After Peer Review |
| Last Date of Publication : |
| 30th, April-2024 |
Volume10 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
| S.NO | TITLE | PAGE NO | DOWNLOAD | |
| IJVDCS 176 | Design of 4:2 Compressor using XOR-XNOR Blocks for High Speed Arithmetic Circuits Authors:V. SHRUTI, B. SATEESH |
0986-0988 |
Download | |
| IJVDCS 177 | Area-Efficient 128- To 2048/1536-Point Pipeline FFT Processor Authors:A. MEENA, DR. S. SAHEB BASHA |
0989-0992 |
Download | |
| IJVDCS 178 | Efficient Implementation of Long Period Random Number Generation by using Well Method Authors:SYED. ARSHIYA, DR. S. SAHEB BASHA |
0993-0996 |
Download | |
| IJVDCS 179 | Low Area and Low Power Error Detection Logics for Inexact Leading Zero Anticipator Authors:SHAIK FARHANA, DR. S. SAHEB BASHA |
0997-1001 |
Download | |
| IJVDCS 180 | A Novel Detection of Moving Objects using Field Programmable Gate Arrays Authors:P. SHASHI KIRAN, DASARI MANOJ REDDY |
1002-1005 |
Download | |
| IJVDCS 181 | A Novel Approach for Realization of Power Efficient LMS Adaptive Filter Authors:CHALLA SWETHA, K. GEETHA |
1006-1111 |
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| IJVDCS 182 | A Novel Technique for Noise Removal Algorithm Implementation on FPGA Authors:V. VENUGOPALA CHARY, R. ANIL KUMAR |
1112-1115 |
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| IJVDCS 183 | Design and Implementation of 32-Bits Carry Skip Adder using CMOS Logic in Virtuoso, Cadence Authors:ISHMEET SINGH, MANIKA DHINGRA |
1116-1121 |
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| IJVDCS 184 | A Novel Signal Feed through Approach to Implement and Analyze the Energy Efficient Pulse Triggered Flip-Flops Authors:Y. ASHOK KUMAR REDDY, U. VEERESH, K. SUDHAKAR, M. SREENIVASULU |
1122-1126 |
Download | |
| IJVDCS 185 | ANFIS Based Performance Analysis of OFDMA System on Rician Fading Channels Authors:NAZEER UNNISA, DR. KALEEM FATIMA |
1127-1133 |
Download | |
